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TC58FVT321/B321FT/XB-70,-10
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
32-MBIT (4M x 8 BITS / 2M x 16 BITS) CMOS FLASH MEMORY DESCRIPTION
The TC58FVT321/B321 is a 33,554,432-bit, 3.0-V read-only electrically erasable and programmable flash memory organized as 4,194,304 words x 8 bits or as 2,097,152 words x 16 bits. The TC58FVT321/B321 features commands for Read, Program and Erase operations to allow easy interfacing with microprocessors. The commands are based on the JEDEC standard. The Program and Erase operations are automatically executed in the chip. The TC58FVT321/B321 also features a Simultaneous Read/Write operation so that data can be read during a Write or Erase operation.
FEATURES
* * * * Power supply voltage VDD = 2.7 V~3.6 V Operating temperature Ta = -40C~85C Organization 4M x 8 bits / 2M x 16 bits Functions Simultaneous Read/Write Auto Program, Auto Erase Fast Program Mode / Acceleration Mode Program Suspend/Resume Erase Suspend/Resume data polling / Toggle bit block protection, boot block protection Automatic Sleep, support for hidden ROM area common flash memory interface (CFI) Byte/Word Modes * * * * * * Block erase architecture 8 x 8 Kbytes / 63 x 64 Kbytes Boot block architecture TC58FVT321FT/XB: top boot block TC58FVB321FT/XB: bottom boot block Mode control Compatible with JEDEC standard commands Erase/Program cycles 105 cycles typ. Access time 70 ns (CL: 30 pF) 100 ns (CL: 100 pF) Power consumption 10 A (Standby) 30 mA (Read operation) 15 mA (Program/Erase operations) Package TC58FVT321/B321FT: TSOPI48-P-1220-0.50 (weight: 0.51 g) TC58FVT321/B321XB: P-TFBGA56-0710-0.80AZ (weight: 0.125 g)
*
000630EBA1
* TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The Toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These Toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of Toshiba products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice.
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TC58FVT321/B321FT/XB-70,-10
PIN ASSIGNMENT (TOP VIEW) TC58FVT321/B321FT
A15 A14 A13 A12 A11 A10 A9 A8 A19 A20 WE RESET NC WP/ACC RY/BY A18 A17 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
PIN NAMES
A16 BYTE VSS DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VDD DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE VSS CE A0 A-1, A0~A20 DQ0~DQ15
CE OE
Address Input Data Input/Output Chip Enable Input Output Enable Input Word/Byte Select Input Write Enable Input Ready/Busy Output Hardware Reset Input Write Protect / Program Acceleration Input Not Connected Power Supply Ground
BYTE WE RY/BY
RESET WP/ACC
NC VDD VSS
PIN ASSIGNMENT (TOP VIEW)
1 A B C D E F G H J K L M NC NC NC NC A3 A4 A2 A1 A0 C OE VSS A7 A17 A6 A5 DQ0 DQ8 DQ9 DQ1 2 3
TC58FVT321/B321XB
4 5 6 7 8 NC NC
RY/BY
WP/ACC A18 A20 DQ2 DQ10 DQ11 DQ3
WE
RESET NC A19 DQ5 DQ12 VDD DQ4
A9 A8 A10 A11 DQ7 DQ14 DQ13 DQ6
A13 A12 A14 A15 A16 BYTE DQ15 VSS NC NC
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BLOCK DIAGRAM
VDD VSS
RY/BY
DQ0
DQ15
RY/BY Buffer
I/O Buffer
WP/ACC
WE BYTE
RESET CE OE
Control Circuit
Data Latch Command Register
Memory Cell Array
Memory Cell Array
Memory Cell Array
Bank 0
Bank 7
Bank 8
A0 Address Buffer Address Latch
A20 A-1
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MODE SELECTION
BYTE MODE WORD MODE MODE Read ID Read (Manufacturer Code) ID Read (Device Code) Standby Output Disable Write Block Protect 1 Verify Block Protect Temporary Block Unprotect Hardware Reset / Standby Boot Block Protect
CE OE
(1)
WE H H H * H
(2) (2)
A9 A9 VID VID * * A9 VID VID * * *
A6 A6 L L * * A6 L L * * *
A1 A1 L L * * A1 H H * * *
A0 A0 L H * * A0 L L * * *
RESET
WP/ACC
DQ0~DQ7 DOUT Code Code High-Z High-Z DIN * Code * High-Z *
DQ0~DQ15 DOUT Code Code High-Z High-Z DIN * Code * High-Z *
L L L H * L L L * * *
L L L * H H VID L * * *
H H H H * H H H VID L *
* * * * * * * * * * L
H * * *
Notes: * = VIH or VIL, L = VIL, H = VIH (1) DQ8~DQ14 are High-Z and DQ15/A-1 is Address Input in Byte Mode. Addresses are A20~A0 in Word Mode ( BYTE = VIH), A20~A-1 in Byte Mode ( BYTE = VIL). (2) Pulse input
ID CODE TABLE
CODE TYPE Manufacturer Code TC58FVT321 Device Code TC58FVB321 Verify Block Protect * BA
(2)
A20~A12 * *
A6 L L L L
A1 L L L H
A0 L H H L
CODE (HEX) 0098H 009AH 009CH Data
(3)
(1)
Notes: * = VIH or VIL, L = VIL, H = VIH (1) DQ8~DQ14 are High-Z and DQ15/A-1 is Address Input in Byte Mode. (2) BA: Block Address (3) 0001H - Protected Block 0000H - Unprotected Block
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COMMAND SEQUENCES
BUS COMMAND SEQUENCE WRITE CYCLES REQ'D Read/Reset Read/Reset Word Byte Word ID Read Byte Word Byte Program Suspend Program Resume Auto Chip Erase Auto Block Erase Word Byte Word Byte 1 1 4 Word 3 Byte Fast Program Set Fast Program Fast Program Reset Hidden ROM Mode Entry Hidden ROM Program Hidden ROM Erase Hidden ROM Mode Exit Word Byte Word Byte Word Byte Word Byte Word 2 Byte 4 6 4 Word Byte 2 2 3 AAAH 555H AAAH XXXH XXXH 555H AAAH 555H AAAH 555H AAAH 555H AAAH BK
(3)
FIRST BUS WRITE CYCLE Addr. XXXH 555H AAAH 555H Data F0H AAH
SECOND BUS WRITE CYCLE Addr. Data
THIRD BUS WRITE CYCLE Addr. Data
FOURTH BUS WRITE CYCLE Addr. Data
FIFTH BUS WRITE CYCLE Addr. Data
SIXTH BUS WRITE CYCLE Addr. Data
1 3
2AAH 555H 2AAH
55H
555H AAAH BK
(3)
F0H
RA
(1)
RD
(2)
+ + 90H IA
(4)
3 AAAH 555H AAAH 1 1 6 BK BK
(3) (3)
AAH 555H 2AAH 555H B0H 30H AAH 2AAH 555H AAH B0H 30H 60H BPA
(9)
55H
555H BK
(3)
ID
(5)
AAAH 55H 555H AAAH A0H PA
(6)
Auto-Program
4
AAH
PD
(7)
555H AAAH
55H
555H AAAH
80H
555H AAAH
AAH
2AAH 555H
55H
555H AAAH
10H
6
555H AAAH BK BK
(3) (3)
2AAH 555H
55H
555H AAAH
80H
555H AAAH
AAH
2AAH 555H
55H
BA
(8)
30H
Block Erase Suspend Block Erase Resume Block Protect 2
XXXH 555H
60H
XXXH BK
(3)
40H
BPA
(9)
BPD
(10)
Verify Block Protect
2AAH AAH 555H 2AAH 555H A0H 90H AAH PA
(6)
+ + 90H BPA
(9)
55H
555H BK
(3)
BPD
(10)
AAAH 55H PD F0H
(7)
3
AAH
555H AAAH
20H
XXXH 2AAH 555H
(13)
55H
555H AAAH
88H
(6) (7)
AAH
2AAH 555H
55H
555H AAAH
A0H
PA
PD
AAH
2AAH 555H
55H
555H AAAH
80H
555H AAAH
AAH
2AAH 555H
55H
BA
(8)
30H
AAH
2AAH 555H
55H
555H AAAH
90H
XXXH
00H
+ + 98H CA
(11)
Query Command
55H BK
(3)
CD
(12)
AAH
Notes: The system should generate the following address patterns: Word Mode: 555H or 2AAH on address pins A10~A0 Byte Mode: AAAH or 555H on address pins A10~A-1 DQ8~DQ15 are ignored in Word Mode. (1) RA: Read Address (2) RD: Read Data (3) BK: Bank Address = A20~A15 (4) IA: Bank Address and ID Read Address (A6, A1, A0) Bank Address = A20~A15 Manufacturer Code = (0, 0, 0) Device Code = (0, 0, 1) (5) ID: ID Data (6) PA: Program Address
(7) PD: Program Data (8) BA: Block Address = A20~A12 (9) BPA: Block Address and ID Read Address (A6, A1, A0) Block Address = A20~A12 ID Read Address = (0, 1, 0) (10) BPD: Verify Data (11) CA: CFI Address (12) CD: CFI Data (13) F0H: 00H is valid too
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SIMULTANEOUS READ/WRITE OPERATION
The TC58FVT321/B321 features a Simultaneous Read/Write operation. The Simultaneous Read/Write operation enables the device to simultaneously write data to or erase data from a bank while reading data from another bank. The TC58FVT321/B321 has a total of nine banks: 1 bank of 0.5 Mbits, 1 bank of 3.5 Mbits and 7 banks of 4 Mbits. Banks can be switched between using the bank addresses (A20~A15). For a description of bank blocks and addresses, please refer to the Block Address Table and Block Size Table. The Simultaneous Read/Write operation cannot perform multiple operations within a single bank. The table below shows the operation modes in which simultaneous operation can be performed. Note that during Auto-Program execution or Auto Block Erase operation, the Simultaneous Read/Write operation cannot read data from addresses in the same bank which have not been selected for operation. Data from these addresses can be read using the Program Suspend or Erase Suspend function, however.
SIMULTANEOUS READ/WRITE OPERATION
STATUS OF BANK ON WHICH OPERATION IS BEING PERFORMED Read Mode ID Read Mode
(1)
STATUS OF OTHER BANKS
Auto-Program Mode Fast Program Mode
(2)
Program Suspend Mode Read Mode Auto Block Erase Mode Auto Multiple Block Erase Mode Erase Suspend Mode Program Suspend during Erase Suspend CFI Mode (1) Only Command Mode is valid. (2) Including times when Acceleration Mode is in use. (3) If the selected blocks are spread across all nine banks, simultaneous operation cannot be carried out.
(3)
OPERATION MODES
In addition to the Read, Write and Erase Modes, the TC58FVT321/B321 features many functions including block protection and data polling. When incorporating the device into a deign, please refer to the timing charts and flowcharts in combination with the description below.
READ MODE
To read data from the memory cell array, set the device to Read Mode. In Read Mode the device can perform high-speed random access as asynchronous ROM. The device is automatically set to Read Mode immediately after power-on or on completion of automatic operation. A software reset releases ID Read Mode and the lock state which the device enters if automatic operation ends abnormally, and sets the device to Read Mode. A hardware reset terminates operation of the device and resets it to Read Mode. When reading data without changing the address immediately after power-on, either input a hardware Reset or change CE from H to L.
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ID Read Mode
ID Read Mode is used to read the device maker code and device code. The mode is useful in that it allows EPROM programmers to identify the device type automatically. ID read can be executed in two ways, as follows: (1) Applying VID to A9 This method is used mainly by EPROM programmers. Applying VID to A9 sets the device to ID Read Mode, outputting the maker code from address 00H and the device code from address 01H. Releasing VID from A9 returns the device to Read Mode. With this method all banks are set to ID Read Mode; thus, simultaneous operation cannot be performed. (2) Input command sequence With this method simultaneous operation can be performed. Inputting an ID Read command sets the specified bank to ID Read Mode. Banks are specified by inputting the bank address (BK) in the third Bus Write cycle of the Command cycle. To read an ID code, the bank address as well as the ID read address must be specified. The maker code is output from address BK + 00; the device code is output from address BK + 01. From other banks data are output from the memory cells. Inputting a Reset command releases ID Read Mode and returns the device to Read Mode. Access time in ID Read Mode is the same as that in Read Mode. For a list of the codes, please refer to the ID Code Table.
Standby Mode
There are two ways to put the device into Standby Mode. (1) Control using CE and RESET With the device in Read Mode, input VDD 0.3 V to CE and RESET . The device will enter Standby Mode and the current will be reduced to the standby current (IDDS1). However, if the device is in the process of performing simultaneous operation, the device will not enter Standby Mode but will instead cause the operating current to flow. (2) Control using RESET only With the device in Read Mode, input VSS 0.3 V to RESET . The device will enter Standby Mode and the current will be reduced to the standby current (IDDS1). Even if the device is in the process of performing simultaneous operation, this method will terminate the current operation and set the device to Standby Mode. This is a hardware reset and is described later. In Standby Mode DQ is put in High-Impedance state.
Auto-Sleep Mode
This function suppresses power dissipation during reading. If the address input does not change for 150 ns, the device will automatically enter Sleep Mode and the current will be reduced to the standby current (IDDS2). However, if the device is in the process of performing simultaneous operation, the device will not enter Standby Mode but will instead cause the operating current to flow. Because the output data is latched, data is output in Sleep Mode. When the address is changed, Sleep Mode is automatically released, and data from the new address is output.
Output Disable Mode
Inputting VIH to OE disables output from the device and sets DQ to High-Impedance.
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Command Write
The TC58FVT321/B321 uses the standard JEDEC control commands for a single-power supply E2PROM. A Command Write is executed by inputting the address and data into the Command Register. The command is written by inputting a pulse to WE with CE = VIL and OE = VIH ( WE control). The command can also be written by inputting a pulse to CE with WE = VIL ( CE control). The address is latched on the falling edge of either WE or CE . The data is latched on the rising edge of either WE or CE . DQ0~DQ7 are valid for data input and DQ8~DQ15 are ignored. To abort input of the command sequence use the Reset command. The device will reset the Command Register and enter Read Mode. If an undefined command is input, the Command Register will be reset and the device will enter Read Mode.
Software Reset
Apply a software reset by inputting a Read/Reset command. A software reset returns the device from ID Read Mode or CFI Mode to Read Mode, releases the lock state if automatic operation has ended abnormally, and clears the Command Register.
Hardware Reset
A hardware reset initializes the device and sets it to Read Mode. When a pulse is input to RESET for tRP, the device abandons the operation which is in progress and enters Read Mode after tREADY. Note that if a hardware reset is applied during data overwriting, such as a Write or Erase operation, data at the address or block being written to at the time of the reset will become undefined. After a hardware reset the device enters Read Mode if RESET = VIH or Standby Mode if RESET = VIL. The DQ pins are High-Impedance when RESET = VIL. After the device has entered Read Mode, Read operations and input of any command are allowed.
Comparison between Software Reset and Hardware Reset
ACTION Releases ID Read Mode or CFI Mode. Clears the Command Register. Releases the lock state if automatic operation has ended abnormally. Stops any automatic operation which is in progress. Stops any operation other than the above and returns the device to Read Mode. SOFTWARE RESET True True True False False HARDWARE RESET True True True True True
BYTE/Word Mode
BYTE is used select Word Mode (16 bits) or Byte Mode (8 bits) for the TC58FVT321/B321. If VIH is input to BYTE , the device will operate in Word Mode. Read data or write commands using DQ0~DQ15. When VIL is input to BYTE , read data or write commands using DQ0~DQ7. DQ15/A-1 is used as the lowest address. DQ8~DQ14 will become High-Impedance.
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Auto-Program Mode
The TC58FVT321/B321 can be programmed in either byte or word units. Auto-Program Mode is set using the Program command. The program address is latched on the falling edge of the WE signal and data is latched on the rising edge of the fourth Bus Write cycle (with WE control). Auto programming starts on the rising edge of the WE signal in the fourth Bus Write cycle. The Program and Program Verify commands are automatically executed by the chip. The device status during programming is indicated by the Hardware Sequence flag. To read the Hardware Sequence flag, specify the address to which the Write is being performed. During Auto-Program execution, a command sequence for the bank on which execution is being performed cannot be accepted. To terminate execution, use a hardware reset. Note that if the Auto-Program operation is terminated in this manner, the data written so far is invalid. Any attempt to program a protected block is ignored. In this case the device enters Read Mode 3 s after the rising edge of the WE signal in the fourth Bus Write cycle. If an Auto-Program operation fails, the device remains in the programming state and does not automatically return to Read Mode. The device status is indicated by the Hardware Sequence flag. Either a Reset command or a hardware reset is required to return the device to Read Mode after a failure. If a programming operation fails, the block which contains the address to which data could not be programmed should not be used. The device allows 0s to be programmed into memory cells which contain a 1. 1s cannot be programmed into cells which contain 0s. If this is attempted, execution of Auto Program will fail. This is a user error, not a device error. A cell containing 0 must be erased in order to set it to 1.
Fast Program Mode
Fast Program is a function which enables execution of the command sequence for the Auto Program to be completed in two cycles. In this mode the first two cycles of the command sequence, which normally requires four cycles, are omitted. Writing is performed in the remaining two cycles. To execute Fast Program, input the Fast Program command. Write in this mode uses the Fast Program command but operation is the same at that for ordinary Auto-Program. The status of the device is indicated by the Hardware Sequence flag and read operations can be performed as usual. To exit this mode, the Fast Program Reset command must be input. When the command is input, the device will return to Read Mode.
Acceleration Mode
The TC58FVT321/B321 features Acceleration Mode which allows write time to be reduced. Applying VACC to WP or ACC automatically sets the device to Acceleration Mode. In Acceleration Mode, Block Protect Mode changes to Temporary Block Unprotect Mode. Write Mode changes to Fast Program Mode. Modes are switched by the WP/ACC signal; thus, there is no need for a Temporary Block Unprotect operation or to set or reset Fast Program Mode. Operation of Write is the same as in Auto-Program Mode. Removing VACC from WP/ACC terminates Acceleration Mode.
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Program Suspend/Resume Mode
Program Suspend is used to enable Data Read by suspending the Write operation. The device accepts a Program Suspend command in Write Mode (including Write operations performed during Erase Suspend) but ignores the command in other modes. When the command is input, the address of the bank on which Write is being performed must be specified. After input of the command, the device will enter Program Suspend Read Mode after tSUSP. During Program Suspend, Cell Data Read, ID Read and CFI Data Read can be performed. When Data Write is suspended, the address to which Write was being performed becomes undefined. ID Read and CFI Data Read are the same as usual. After completion of Program Suspend input a Program Resume command to return to Write Mode. When inputting the command, specify the address of the bank on which Write is being performed. If the ID Read or CFI Data Read functions is being used, abort the function before inputting the Resume command. On receiving the Resume command, the device returns to Write Mode and resumes outputting the Hardware Sequence flag for the bank to which data is being written. Program Suspend can be run in Fast Program Mode or Acceleration Mode. However, note that when running Program Suspend in Acceleration Mode, VACC must not be released.
Auto Chip Erase Mode
The Auto Chip Erase Mode is set using the Chip Erase command. An Auto Chip Erase operation starts on the rising edge of WE in the sixth bus cycle. All memory cells are automatically preprogrammed to 0, erased and verified as erased by the chip. The device status is indicated by the Hardware Sequence flag. Command input is ignored during an Auto Chip Erase. A hardware reset can interrupt an Auto Chip Erase operation. If an Auto Chip Erase operation is interrupted, it cannot be completed correctly. Hence an additional Erase operation must be performed. Any attempt to erase a protected block is ignored. If all blocks are protected, the Auto Erase operation will not be executed and the device will enter Read mode 100 s after the rising edge of the WE signal in the sixth bus cycle. If an Auto Chip Erase operation fails, the device will remain in the erasing state and will not return to Read Mode. The device status is indicated by the Hardware Sequence flag. Either a Reset command or a hardware reset is required to return the device to Read Mode after a failure. In this case it cannot be ascertained which block the failure occurred in. Either abandon use of the device altogether, or perform a Block Erase on each block, identify the failed block, and stop using it. The host processor must take measures to prevent subsequent use of the failed block.
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Auto Block Erase / Auto Multi-Block Erase Modes
The Auto Block Erase Mode and Auto Multi-Block Erase Mode are set using the Block Erase command. The block address is latched on the falling edge of the WE signal in the sixth bus cycle. The block erase starts as soon as the Erase Hold Time (tBEH) has elapsed after the rising edge of the WE signal. When multiple blocks are erased, the sixth Bus Write cycle is repeated with each block address and Auto Block Erase command being input within the Erase Hold Time (this constitutes an Auto Multi-Block Erase operation). If a command other than an Auto Block Erase command or Erase Suspend command is input during the Erase Hold Time, the device will reset the Command Register and enter Read Mode. The Erase Hold Time restarts on each successive rising edge of WE . Once operation starts, all memory cells in the selected block are automatically preprogrammed to 0, erased and verified as erased by the chip. The device status is indicated by the setting of the Hardware Sequence flag. When the Hardware Sequence flag is read, the addresses of the blocks on which auto-erase operation is being performed must be specified. If the selected blocks are spread across all nine banks, simultaneous operation cannot be carried out. All commands (except Erase Suspend) are ignored during an Auto Block Erase or Auto Multi-Block Erase operation. Either operation can be aborted using a Hardware Reset. If an auto-erase operation is interrupted, it cannot be completed correctly; therefore, a further erase operation is necessary to complete the erasing. Any attempt to erase a protected block is ignored. If all the selected blocks are protected, the auto-erase operation is not executed and the device returns to Read Mode 100 s after the rising edge of the WE signal in the last bus cycle. If an auto-erase operation fails, the device remains in Erasing state and does not return to Read Mode. The device status is indicated by the Hardware Sequence flag. After a failure either a Reset command or a Hardware Reset is required to return the device to Read Mode. If multiple blocks are selected, it will not be possible to ascertain the block in which the failure occurred. In this case either abandon use of the device altogether, or perform a Block Erase on each block, identify the failed block, and stop using it. The host processor must take measures to prevent subsequent use of the failed block.
Erase Suspend / Erase Resume Modes
Erase Suspend Mode suspends Auto Block Erase and reads data from or writes data to an unselected block. The Erase Suspend command is allowed during an auto block erase operation but is ignored in all other oreration modes . When the command is input, the address of the bank on which Erase is being performed must be specified. In Erase Suspend Mode only a Read, Program or Resume command can be accepted. If an Erase Suspend command is input during an Auto Block Erase, the device will enter Erase Suspend Read Mode after tSUSE. The device status (Erase Suspend Read Mode) can be verified by checking the Hardware Sequence flag. If data is read consecutively from the block selected for Auto Block Erase, the DQ2 output will toggle and the DQ6 output will stop toggling and RY/ BY will be set to High-Impedance. Inputting a Write command during an Erase Suspend enables a Write to be performed to a block which has not been selected for the Auto Block Erase. Data is written in the usual manner. To resume the Auto Block Erase, input an Erase Resume command. On input of the command, the address of the bank on which the Write was being performed must be specified. On receiving an Erase Resume command, the device returns to the state it was in when the Erase Suspend command was input. If an Erase Suspend command is input during the Erase Hold Time, the device will return to the state it was in at the start of the Erase Hold Time. At this time more blocks can be specified for erasing. If an Erase Resume command is input during an Auto Block Erase, Erase resumes. At this time toggle output of DQ6 resumes and 0 is output on RY/ BY .
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Block Protection
Block Protection is a function for disabling writing and erasing specific blocks. Block protection can be carried out in two ways: by supplying a high voltage (VID) to the device (see Block protection 1) or by supplying a high voltage and a command sequence (see Block protection 2). (1) Block protection 1 Specify a device block address and make the following signal settings A9 = OE = VID, A1 = VIH and CE = A0 = A6 = VIL. Now when a pulse is input to WE for tPPLH, the device will start to write to the block protection circuit. Block protection can be verified using the Verify Block Protect command. Inputting VIL on OE sets the device to Verify Mode. 01H is output if the block is protected and 00H is output if the block is unprotected. If block protection was unsuccessful, the operation must be repeated. Releasing VID from A9 and OE terminates this mode. (2) Block protection 2 Applying VID to RESET and inputting the Block Protect 2 command also performs block protection. The first cycle of the command sequence is the Set-up command. In the second cycle, the Block Protect command is input, in which a block address and A1 = VIH and A0 = A6 = VIL are input. Now the device writes to the block protection circuit. There is a wait of tPPLH until this write is completed; however, no intervention is necessary during this time. In the third cycle the Verify Block Protect command is input. This command verifies the write to the block protection circuit. Read is performed in the fourth cycle. If the protection operation is complete, 01H is output. If a value other than 01H is output, block protection is not complete and the Block Protect command must be input again. Removing the VID input from RESET exits this mode.
Temporary Block Unprotection
The TC58FVT321/B321 has a temporary block unprotection feature which disables block protection for all protected blocks. Unprotection is enabled by applying VID to the RESET pin. Now Write and Erase operations can be performed on all blocks except the boot blocks which have been protected by the Boot Block Protect operation. The device returns to its previous state when VID is removed from the RESET pin. That is, previously protected blocks will be protected again.
Verify Block Protect
The Verify Block Protect command is used to ascertain whether a block is protected or unprotected. Verification is performed either by inputting the Verify Block Protect command or by applying VID to the A9 pin, as for ID Read Mode, and setting the block address = A0 = A6 = VIL and A1 = VIH. If the block is protected, 01H is output. If the block is unprotected, 00H is output.
Boot Block Protection
Boot block protection temporarily protects certain boot blocks using a method different from ordinary block protection. Neither VID nor a command sequence is required. Protection is performed simply by inputting VIL on WP/ACC . The target blocks are the two pairs of boot blocks. The top boot blocks are BA69 and BA70; the bottom boot blocks are BA0 and BA1. Inputting VIH on WP/ACC releases the mode. From now on, if it is necessary to protect these blocks, the ordinary Block Protection Mode must be used.
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TC58FVT321/B321FT/XB-70,-10
Hidden ROM Area
The TC58FVT321/B321 features a 64-Kbyte hidden ROM area which is separate from the memory cells. The area consists of one block. Data Read, Write and Protect can be performed on this block. Because Protect cannot be released, once the block is protected, data in the block cannot be overwritten. The hidden ROM area is located in the address space indicated in the HIDDEN ROM AREA ADDRESS TABLE. To access the Hidden ROM area, input a Hidden ROM Mode Entry command. The device now enters Hidden ROM Mode, allowing Read, Write, Erase and Block Protect to be executed. Write and Erase operations are the same as auto operations except that the device is in Hidden ROM Mode. However, regarding write operation, Accelaration mode can not be performed during Hidden ROM Mode. To protect the hidden ROM area, use the block protection function. The operation of Block Protect here is the same as a normal Block Protect except that VIH rather than VID is input to RESET . Once the block has been protected, protection cannot be released, even using the temporary block unprotection function. Use Block Protect carefully. Note that in Hidden ROM Mode, simultaneous operation cannot be performed. Therefore, do not attempt to access areas other than the hidden ROM area. To exit Hidden ROM Mode, use the Hidden ROM Mode Exit command. This will return the device to Read Mode.
HIDDEN ROM AREA ADDRESS TABLE
TYPE BOOT BLOCK ARCHITECTURE TOP BOOT BLOCK BOTTOM BOOT BLOCK BYTE MODE ADDRESS RANGE 3F0000H~3FFFFFH 000000H~00FFFFH SIZE 64 Kbytes 64 Kbytes WORD MODE ADDRESS RANGE 1F8000H~1FFFFFH 000000H~007FFFH SIZE 32 Kwords 32 Kwords
TC58FVT321 TC58FVB321
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TC58FVT321/B321FT/XB-70,-10
COMMON FLASH MEMORY INTERFACE (CFI)
The TC58FVT321/B321 conforms to the CFI specifications. To read information from the device, input the Query command followed by the address. In Word Mode DQ8~DQ15 all output 0s. To exit this mode, input the Reset command.
CFI CODE TABLE
ADDRESS A6~A0 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH DATA DQ15~DQ0 0051H 0052H 0059H 0002H 0000H 0040H 0000H 0000H 0000H 0000H 0000H DESCRIPTION
ASCII string "QRY"
Primary OEM command set 2: AMD/FJ standard type Address for primary extended table Alternate OEM command set 0: none exists Address for alternate OEM extended table VDD (min) (Write/Erase) DQ7~DQ4: 1 V DQ3~DQ0: 100 mV VDD (max) (Write/Erase) DQ7~DQ4: 1 V DQ3~DQ0: 100 mV VPP (min) voltage VPP (max) voltage Typical time-out per single byte/word write (2 s) Typical time-out for minimum size buffer write (2 s) Typical time-out per individual block erase (2 ms) Typical time-out for full chip erase (2 ms) Maximum time-out for byte/word write (2 times typical) Maximum time-out for buffer write (2 times typical) Maximum time-out per individual block erase (2 times typical) Maximum time-out for full chip erase (2 times typical) Device Size (2 byte) Flash device interface description 2: x8/x16 Maximum number of bytes in multi-byte write (2 )
N N N N N N N N N N
1BH
0027H
1CH
0036H
1DH 1EH 1FH 20H 21H 22H 23H 24H 25H 26H 27H 28H 29H 2AH 2BH
0000H 0000H 0004H 0000H 000AH 0000H 0005H 0000H 0004H 0000H 0016H 0002H 0000H 0000H 0000H
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TC58FVT321/B321FT/XB-70,-10
ADDRESS A6~A0 2CH 2DH 2EH 2FH 30H 31H 32H 33H 34H 40H 41H 42H 43H 44H DATA DQ15~DQ0 0002H 0007H 0000H 0020H 0000H 003EH 0000H 0000H 0001H 0050H 0052H 0049H 0031H 0031H DESCRIPTION Number of erase block regions within device Erase Block Region 1 information Bits 0~15: y = block number Bits 16~31: z = block size (z x 256 bytes)
Erase Block Region 2 information
ASCII string "PRI"
Major version number, ASCII Minor version number, ASCII Address-Sensitive Unlock 0: Required 1: Not required Erase Suspend 0: Not supported 1: For Read-only 2: For Read & Write Block Protect 0: Not supported X: Number of blocks per group Block Temporary Unprotect 0: Not supported 1: Supported Block Protect/Unprotect scheme Simultaneous operation 0: Not supported 1: Supported Burst Mode 0: Not supported Page Mode 0: Not supported VACC (min) voltage DQ7~DQ4: 1 V DQ3~DQ0: 100 mV VACC (max) voltage DQ7~DQ4: 1 V DQ3~DQ0: 100 mV Top/Bottom Boot Block Flag 2: TC58FVB321 3: TC58FVT321 Program suspend 0: Not supported 1: Supported
45H
0000H
46H
0002H
47H
0001H
48H
0001H
49H
0004H
4AH
0001H
4BH
0000H
4CH
0000H
4DH
0085H
4EH
0095H
4FH
000XH
50H
0001H
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TC58FVT321/B321FT/XB-70,-10
HARDWARE SEQUENCE FLAGS
The TC58FVT321/B321 has a Hardware Sequence flag which allows the device status to be determined during an auto mode operation. The output data is read out using the same timing as that used when CE = OE = VIL in Read Mode. The RY/ BY output can be either High or Low. The device re-enters Read Mode automatically after an auto mode operation has been completed successfully. The Hardware Sequence flag is read to determine the device status and the result of the operation is verified by comparing the read-out data with the original data.
STATUS Auto Programming Read in Program Suspend
(1)
DQ7
DQ 7
DQ6 Toggle Data Toggle Toggle Toggle Toggle 1 Data Toggle Toggle Toggle Toggle Toggle
DQ5 0 Data 0 0 0 0 0 Data 0 0 1 1 1
DQ3 0 Data 0 0 1 1 0 Data 0 0 0 1 0
DQ2 1 Data Toggle 1 Toggle 1 Toggle Data Toggle 1 1 NA NA
RY/BY 0 High-Z 0 0 0 0 High-Z High-Z 0 0 0 0 0
Data Selected
(2) (3)
0 0 0 0 1 Data
DQ 7 DQ 7 DQ 7
Erase Hold Time In Auto Erase In Progress Auto Erase Selected
Not-selected
Not-selected Selected Read In Erase Suspend Programming Not-selected Auto Programming Time Limit Exceeded Auto Erase Programming in Erase Suspend Not-selected Selected
0
DQ 7
Notes: DQ outputs cell data and RY/BY goes High-Impedence when the operation has been completed. DQ0 and DQ1 pins are reserved for future use. 0 is output on DQ0, DQ1 and DQ4. (1) Data output from an address to which Write is being performed is undefined. (2) Output when the block address selected for Auto Block Erase is specified and data is read from there. During Auto Chip Erase, all blocks are selected. (3) Output when a block address not selected for Auto Block Erase of same bank as selected block is specified and data is read from there.
DQ7 ( DATA polling)
During an Auto-Program or auto-erase operation, the device status can be determined using the data polling function. DATA polling begins on the rising edge of WE in the last bus cycle. In an Auto-Program operation, DQ7 outputs inverted data during the programming operation and outputs actual data after programming has finished. In an auto-erase operation, DQ7 outputs 0 during the Erase operation and outputs 1 when the Erase operation has finished. If an Auto-Program or auto-erase operation fails, DQ7 simply outputs the data. When the operation has finished, the address latch is reset. Data polling is asynchronous with the OE signal.
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TC58FVT321/B321FT/XB-70,-10
DQ6 (Toggle bit 1)
The device status can be determined by the Toggle Bit function during an Auto-Program or auto-erase operation. The Toggle bit begins toggling on the rising edge of WE in the last bus cycle. DQ6 alternately outputs a 0 or a 1 for each OE access while CE = VIL while the device is busy. When the internal operation has been completed, toggling stops and valid memory cell data can be read by subsequent reading. If the operation fails, the DQ6 output toggles. If an attempt is made to execute an Auto Program operation on a protected block, DQ6 will toggle for around 3 s. It will then stop toggling. If an attempt is made to execute an auto erase operation on a protected block, DQ6 will toggle for around 100 s. It will then stop toggling. After toggling has stopped the device will return to Read Mode.
DQ5 (internal time-out)
If the internal timer times out during a Program or Erase operation, DQ5 outputs a 1. This indicates that the operation has not been completed within the allotted time. Any attempt to program a 1 into a cell containing a 0 will fail (see Auto-Program Mode). In this case DQ5 outputs a 1. Either a hardware reset or a software Reset command is required to return the device to Read Mode.
DQ3 (Block Erase timer)
The Block Erase operation starts 50 s (the Erase Hold Time) after the rising edge of WE in the last command cycle. DQ3 outputs a 0 for the duration of the Block Erase Hold Time and a 1 when the Block Erase operation starts. Additional Block Erase commands can only be accepted during the Block Erase Hold Time. Each Block Erase command input within the hold time resets the timer, allowing additional blocks to be marked for erasing. DQ3 outputs a 1 if the Program or Erase operation fails.
DQ2 (Toggle bit 2)
DQ2 is used to indicate which blocks have been selected for Auto Block Erase or to indicate whether the device is in Erase Suspend Mode. If data is read continuously from the selected block during an Auto Block Erase, the DQ2 output will toggle. Now 1 will be output from non-selected blocks; thus, the selected block can be ascertained. If data is read continuously from the block selected for Auto Block Erase while the device is in Erase Suspend Mode, the DQ2 output will toggle. Because the DQ6 output is not toggling, it can be determined that the device is in Erase Suspend Mode. If data is read from the address to which data is being written during Erase Suspend in Programming Mode, DQ2 will output a 1.
RY/BY (READY/ BUSY )
The TC58FVT321/B321 has a RY/ BY signal to indicate the device status to the host processor. A 0 (Busy state) indicates that an Auto-Program or auto-erase operation is in progress. A 1 (Ready state) indicates that the operation has finished and that the device can now accept a new command. RY/ BY outputs a 0 when an operation has failed. RY/ BY outputs a 0 after the rising edge of WE in the last command cycle. During an Auto Block Erase operation, commands other than Erase Suspend are ignored. RY/ BY outputs a 1 during an Erase Suspend operation. The output buffer for the RY/ BY pin is an open-drain type circuit, allowing a wired-OR connection. A pull-up resistor must be inserted between VDD and the RY/ BY pin.
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TC58FVT321/B321FT/XB-70,-10
DATA PROTECTION
The TC58FVT321/B321 includes a function which guards against malfunction or data corruption.
Protection against Program/Erase Caused by Low Supply Voltage
To prevent malfunction at power-on or power-down, the device will not accept commands while VDD is below VLKO. In this state, command input is ignored. If VDD drops below VLKO during an Auto Operation, the device will terminate Auto-Program execution. In this case, Auto operation is not executed again when VDD return to recommended VDD voltage Therefore, command need to be input to execute Auto operation again. When VDD > VLKO, make up countermeasure to be input accurately command in system side please.
Protection against Malfunction Caused by Glitches
To prevent malfunction during operation caused by noise from the system, the device will not accept pulses shorter than 3 ns (Typ.) input on WE , CE or OE . However, if a glitch exceeding 3 ns (Typ.) occurs and the glitch is input to the device malfunction may occur. The device uses standard JEDEC commands. It is conceivable that, in extreme cases, system noise may be misinterpreted as part of a command sequence input and that the device will acknowledge it. Then, even if a proper command is input, the device may not operate. To avoid this possibility, clear the Command Register before command input. In an environment prone to system noise, Toshiba recommend input of a software or hardware reset before command input.
Protection against Malfunction at Power-on
To prevent damage to data caused by sudden noise at power-on, when power is turned on with WE = CE = VIL the device does not latch the command on the first rising edge of WE or CE . Instead, the device automatically Resets the Command Register and enters Read Mode.
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TC58FVT321/B321FT/XB-70,-10
ABSOLUTE MAXIMUM RATINGS
SYMBOL VDD VIN VDQ VIDH VACCH PD TSOLDER TSTG TOPR IOSHORT VDD Supply Voltage Input Voltage Input/Output Voltage Maximum Input Voltage for A9, OE and RESET Maximum Input Voltage for WP/ACC Power Dissipation Soldering Temperature (10 s) Storage Temperature Operating Temperature Output Short-Circuit Current
(1)
PARAMETER
RANGE -0.6~4.6 -0.6~VDD + 0.5 ( 4.6) -0.6~VDD + 0.5 ( 4.6) 13.0 10.5 126 260 -55~150 -40~85 100
UNIT V V V V V mW C C C mA
(1) Outputs should be shorted for no more than one second. No more than one output should be shorted at a time.
CAPACITANCE (Ta = 25C, f = 1 MHz)
TSOPI
SYMBOL CIN COUT CIN2 Input Pin Capacitance Output Pin Capacitance Control Pin Capacitance PARAMETER CONDITION VIN = 0 V VOUT = 0 V VIN = 0 V MAX 4 8 7 UNIT pF pF pF
This parameter is periodically sampled and is not tested for every device.
TFBGA
SYMBOL CIN COUT CIN2 Input Pin Capacitance Output Pin Capacitance Control Pin Capacitance PARAMETER CONDITION VIN = 0 V VOUT = 0 V VIN = 0 V MAX 4 8 7 UNIT pF pF pF
This parameter is periodically sampled and is not tested for every device.
RECOMMENDED DC OPERATING CONDITIONS
SYMBOL VDD VIH VIL VID VACC Ta VDD Supply Voltage Input High-Level Voltage Input Low-Level Voltage High-Level Voltage for A9, OE and RESET High-Level Voltage for WP/ACC Operating Temperature
(3) (3)
PARAMETER
MIN 2.7 0.7 x VDD -0.3
(1)
MAX 3.6 VDD + 0.3
(2)
UNIT
0.2 x VDD 12.6 9.5 85
V
11.4 8.5 -40
C
(1) -2 V (pulse width of 20 ns max) (2) +2 V (pulse width of 20 ns max) (3) Do not apply VID/VACC when the supply voltage is not within the device's recommended operating voltage range.
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TC58FVT321/B321FT/XB-70,-10
DC CHARACTERISTICS
SYMBOL ILI ILO VOH VOL IDDO1 IDDO2 IDDO3 IDDO4 IDDO5 IDDO6 IDDS1 IDDS2 IID IACC VLKO PARAMETER Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage VDD Average Read Current VDD Average Program Current VDD Average Erase Current VDD Average Read-While-Program Current VDD Average Read-while-Erase Current VDD Average Program-whileErase-Suspend Current VDD Standby Current VDD Standby Current (1) (Automatic Sleep Mode ) High-Voltage Input Current for A9, OE and RESET High-Voltage Input Current for WP/ACC Low-VDD Lock-out Voltage CONDITION 0 V VIN VDD 0 V VOUT VDD IOH = -0.1 mA IOH = -2.5 mA IOL = 4.0 mA VIN = VIH/VIL, IOUT = 0 mA tCYCLE = tRC = 100 ns VIN = VIH/VIL, IOUT = 0 mA VIN = VIH/VIL, IOUT = 0 mA VIN = VIH/VIL, IOUT = 0 mA tCYCLE = tRC = 100 ns VIN = VIH/VIL, IOUT = 0 mA tCYCLE = tRC = 100 ns VIN = VIH/VIL, IOUT = 0 mA
CE = RESET = VDD or RESET = VSSV
MIN VDD - 0.4 0.85 x VDD 2.3
MAX 1 1 0.4 30 15 15 45
UNIT A
V
mA
45
15
10 A
VIH = VDD VIL = VSS 11.4 V VID 12.6 V 8.5 V VACC 9.5 V
10
35
20 2.5
mA V
(1) The device enters Automatic Sleep Mode in which the address remains fixed for during 150 ns.
AC TEST CONDITIONS
PARAMETER Input Pulse Level Input Pulse Rise and Fall Time (10%~90%) Timing Measurement Reference Level (input) Timing Measurement Reference Level (output) Output Load CONDITION VDD, 0.0 V 5 ns 1.5 V, 1.5 V 1.5 V, 1.5 V CL (100 pF) + 1 TTL Gate / CL (30 pF) + 1 TTL Gate
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TC58FVT321/B321FT/XB-70,-10
AC CHARACTERISTICS AND OPERATING CONDITIONS
READ CYCLE
PRODUCT NAME OUTPUT CAPACITANCE LOAD (CL) SYMBOL tRC tACC tCE tOE tCEE tOEE tOH tDF1 tDF2 Read Cycle Time Address Access Time
CE Access Time OE Access Time CE to Output Low-Z OE to Output Low-Z
-70 30pF MIN 70 0 0 0 MAX 70 70 30 25 25 100pF MIN 80 0 0 0 MAX 80 80 35 25 25 30pF MIN 90 0 0 0
-10 100pF MIN 100 0 0 0 MAX UNIT 100 100 40 30 30 ns ns ns ns ns ns ns ns ns
PARAMETER
MAX 90 90 35 30 30
Output Data Hold Time
CE to Output High-Z OE to Output High-Z
BLOCK PROTECT
SYMBOL tVPT tVPS tCESP tVPH tPPLH VID Transition Time VID Set-up Time
CE Set-up Time OE Hold Time
PARAMETER
MIN 4 4 4 4 100
MAX
UNIT s s s s s
WE Low-Level Hold Time
PROGRAM AND ERASE CHARACTERISTICS
SYMBOL PARAMETER Auto-Program Time (Byte Mode) tPPW Auto-Program Time (Word Mode) tPCEW tPBEW tEW Auto Chip Erase Time Auto Block Erase Time Erase/Program Cycle MIN 10
5
TYP. 8 11 50 0.7
MAX 300 300 710 10
UNIT s s s s Cycles
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TC58FVT321/B321FT/XB-70,-10
COMMAND WRITE/PROGRAM/ERASE CYCLE
SYMBOL PARAMETER MIN tCMD
tAS
-70 MAX 90 300 20 30 1.5 1 15 1 MIN 100 0 50 20 50 0 50 20 0 0 50 20 0 0 0 90 20 0 0 50 500 500 0 50 5
-10 MAX 90 300 20 30 1.5 1 15 1
UNIT
Command Write Cycle Time Address Set-up Time / BYTE Set-up Time Address Hold Time / BYTE Hold Time Address Hold Time from WE High level Data Set-up Time Data Hold Time WE Low-Level Hold Time WE High-Level Hold Time
CE Set-up Time to WE Active CE Hold Time from WE High Level CE Low-Level Hold Time CE High-Level Hold Time
70 0 40 20 40 0
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns s s ns ns ns s ns ns ns ns s s s s
tAH tAHW tDS tDH tWELH tWEHH tCES tCEH tCELH tCEHH tWES tWEH tOES tOEHP tOEHT tAHT tAST tBEH tVDS tBUSY
( WE Control) ( WE Control)
( WE Control) ( WE Control) ( CE Control) ( CE Control) ( CE Control) ( CE Control)
40 20 0 0 40 20 0 0 0 90 20 0 0 50 500 500 0 50 5
WE Set-up time to CE Active WE Hold Time from CE High Level
OE Set-up Time OE Hold Time (Toggle, Data Polling) OE High-Level Hold Time (Toggle)
Address Hold Time (Toggle) Address Set-up Time (Toggle) Erase Hold Time VDD Set-up Time Program/Erase Valid to RY/BY Delay Program/Erase Valid to RY/BY Delay during Suspend Mode
tRP tREADY tRB tRH tCEBTS tBTD tSUSP tRESP tSUSE tRESE
RESET Low-Level Hold Time RESET Low-Level to Read Mode
RY/BY Recovery Time
RESET Recovery Time CE Set-up time BYTE Transition
BYTE to Output High-Z Program Suspend Command to Suspend Mode Program Resume Command to Program Mode Erase Suspend Command to Suspend Mode Erase Resume Command to Erase Mode
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TC58FVT321/B321FT/XB-70,-10
TIMING DIAGRAMS
VIH or VIL Data invalid
Read / ID Read Operation
tRC Address tACC tCE
CE
tOH
tOE tOEE
OE
tDF1
tAHW WE tOEH
tCEE
tDF2
DOUT
Hi-Z
Output data valid
Hi-Z
ID Read Operation (apply VID to A9)
tRC A0
A1 tACC A6
VID VIH A9
tVPS tCE
CE
tOE
OE
WE
DOUT Read Mode
Hi-Z
Manufacturer code
Hi-Z
Device code
Hi-Z Read Mode
ID Read Mode
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TC58FVT321/B321FT/XB-70,-10
Command Write Operation
This is the timing of the Command Write Operation. The timing which is described in the following pages is essentially the same as the timing shown on this page. * WE Control
tCMD Address tAS Command address tAH
CE
tCES
tCEH
WE tWEL tDS DIN tDH tWEHH
Command data
*
CE Control
tCMD Address tAS Command address tAH
CE
tCELH tWES WE tDS DIN tDH tWEH
tCEHH
Command data
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TC58FVT321/B321FT/XB-70,-10
ID Read Operation (input command sequence)
BK + 555H BK + 00H tRC BK + 01H
Address
555H tCMD
2AAH
CE
OE
tOES WE
DIN
AAH
55H
90H Manufacturer code Device code
DOUT
Hi-Z Read Mode (input of ID Read command sequence) ID Read Mode
(Continued)
Address
555H tCMD
2AAH
555H
CE
OE
WE
DIN
AAH
55H
F0H
DOUT
Hi-Z ID Read Mode (input of Reset command sequence) Read Mode
Note: Word Mode address shown. BK: bank address
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TC58FVT321/B321FT/XB-70,-10
Auto-Program Operation ( WE Control)
Address
555H tCMD
2AAH
555H
PA
PA
CE
OE
tOEHP tOES tPPW
WE
DIN
AAH
55H
A0H
PD
DOUT tVDS VDD Note: Word Mode address shown. PA: Program address PD: Program data
Hi-Z
DQ7
DOUT
Auto Chip Erase / Auto Block Erase Operation ( WE Control)
Address
555H tCMD
2AAH
555H
555H
2AAH
555H/BA
CE
OE
tOES WE
DIN tVDS VDD
AAH
55H
80H
AAH
55H
10H/30H
Note: Word Mode address shown. BA: Block address for Auto Block Erase operation
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TC58FVT321/B321FT/XB-70,-10
Auto-Program Operation ( CE Control)
Address
555H tCMD
2AAH
555H
PA
PA
CE
tPPW
OE
tOEHP tOES
WE
DIN
AAH
55H
A0H
PD
DOUT tVDS VDD Note: Word Mode address shown. PA: Program address PD: Program data
Hi-Z
DQ7
DOUT
Auto Chip Erase / Auto Block Erase Operation ( CE Control)
Address 555H tCMD 2AAH 555H 555H
2AAH
555H/BA
CE
OE
tOES WE
DIN tVDS VDD
AAH
55H
80H
AAH
55H
10H/30H
Note: Word Mode address shown. BA: Block address for Auto Block Erase operation
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TC58FVT321/B321FT/XB-70,-10
Program/Erase Suspend Operation
Address BK RA
CE
OE
WE tOE DIN B0H tCE DOUT Hi-Z tSUSP/tSUSE RY/BY Program/Erase Mode RA: Read address Suspend Mode DOUT Hi-Z
Program/Erase Resume Operation
Address RA BK PA/BA
CE
OE
tOES WE tDF1 tDF2 30H
tRESP/tRESE
tOE
DIN
tCE DOUT DOUT Hi-Z Flag Hi-Z
RY/BY Suspend Mode PA: Program address BK: Bank address BA: Block address RA: Read address Flag: Hardware Sequence flag Program/Erase Mode
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TC58FVT321/B321FT/XB-70,-10
RY/BY during Auto Program/Erase Operation
CE
Command input sequence
WE tBUSY During operation
RY / BY
Hardware Reset Operation
WE tRB
RESET
tRP tREADY RY/BY
Read after RESET
tRC
Address tRH
RESET
tACC
tOH
DOUT
Hi-Z
Output data valid
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TC58FVT321/B321FT/XB-70,-10
BYTE during Read Operation
CE
tCEBTS
OE
BYTE tBTD DQ0~DQ7 Data Output Data Output
DQ8~DQ14
Data Output tACC
DQ15/A-1
Data Output
Address Input
BYTE during Write Operation
CE
WE tAS BYTE tAH
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TC58FVT321/B321FT/XB-70,-10
Hardware Sequence Flag ( DATA Polling)
Last Command Address tCMD
Address
PA/BA
CE
tCE tOE
OE
tDF1
tOEHP WE tPPW /tPCEW /tPBEW DIN
Last Command Data
tDF2
tACC
tOH
DQ7
DQ7
Valid
Valid
DQ0~DQ6 tBUSY RY/BY PA: Program address BA: Block address
Invalid
Valid
Valid
Hardware Sequence Flag (Toggle bit)
Address tAST
CE
tAST
tAHT tOEHT tAHT tCE
OE
tOEHP
WE
tOE DIN
Last Command Data
DQ2/6 tBUSY RY/BY
Toggle
Toggle
Toggle
Stop* Toggle
Valid
*DQ2/DQ6 stops toggling when auto operation has been completed.
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TC58FVT321/B321FT/XB-70,-10
Block Protect 1 Operation
Block Protect Address BA Verify Block Protect
A0
A1 tVPT A6
VID VIH A9
VID VIH OE
tVPS tPPLH
tVPH tVPH
WE tCESP
CE
tOE
DOUT
Hi-Z
01H*
Hi-Z
BA: Block address *: 01H indicates that block is protected.
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TC58FVT321/B321FT/XB-70,-10
Block Protect 2 Operation
BA + 1
Address tCMD A0
BA tCMD
BA tCMD
BA tRC
A1
A6
CE
OE
tPPLH WE tVPS VID VIH
RESET
DIN
60H
60H
40H tOE
60H
DOUT
Hi-Z
01H*
BA: Block address BA + 1: Address of next block *: 01H indicates that block is protected.
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TC58FVT321/B321FT/XB-70,-10
FLOWCHARTS
Auto Program
Start
Auto-Program Command Sequence (see below)
DATA Polling or Toggle Bit
Address = Address + 1
No
Last Address? Yes Auto Program Completed
Auto-Program Command Sequence (address/data)
555H/AAH
2AAH/55H
555H/A0H
Program Address/ Program Data
Note: The above command sequence takes place in Word Mode.
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TC58FVT321/B321FT/XB-70,-10
Fast Program
Start
Fast Program Set Command Sequence (see below) Fast Program Command Sequence (see below)
DATA Polling or Toggle Bit
Address = Address + 1
No
Last Address? Yes Program Sequence (see below) Fast Program Completed
Fast Program Set Command Sequence (Address/Data) 555H/AAH
Fast Program Command Sequence (Address/Data) XXXH/A0H
Fast Program Reset Command Sequence (Address/Data) XXXH/90H
2AAH/55H
Program Address/ Program Data
XXXH/F0H
555H/20H
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TC58FVT321/B321FT/XB-70,-10
Auto Erase
Start
Auto Erase Command Sequence (see below)
DATA Polling or Toggle Bit
Auto Erase Completed
Auto Chip Erase Command Sequence (address/data)
Auto Block / Auto-Multi Block Erase Command Sequence (address/data)
555H/AAH
555H/AAH
2AAH/55H
2AAH/55H
555H/80H
555H/80H
555H/AAH
555H/AAH
2AAH/55H
2AAH/55H
555H/10H
Block Address/30H
Block Address/30H
Block Address/30H
Additional address inputs during Auto Multi-Block Erase
Note: The above command sequence takes place in Word Mode.
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TC58FVT321/B321FT/XB-70,-10
DQ7 DATA Polling
Start
Read Byte (DQ0~DQ7) Addr. = VA DQ7 = Data? No No DQ5 = 1? Yes Read Byte (DQ0~DQ7) Addr. = VA DQ7 = Data? No Fail Pass Yes 1) 1) : DQ7 must be rechecked even if DQ5 = 1 because DQ7 may change at the same time as DQ5. Yes
DQ6 Toggle Bit
Start
Read Byte (DQ0~DQ7) Addr. = VA DQ6 = Toggle? Yes No DQ5 = 1? Yes Read Byte (DQ0~DQ7) Addr. = VA DQ6 = Toggle? Yes Fail Pass No 1) 1) : DQ6 must be rechecked even if DQ5 = 1 because DQ6 may stop toggling at the same time that DQ5 changes to 1. No
VA: Byte address for programming Any of the addresses within the block being erased during a Block Erase operation "Don't care" during a Chip Erase operation Any address not within the current block during an Erase Suspend operation
2002-08-06 37/48
TC58FVT321/B321FT/XB-70,-10
Block Protect 1
Start
PLSCNT = 1
Set up Block Address Addr. = BPA
Wait for 4 s
OE = A9 = VID, CE = VIL
Wait for 4 s
WE = VIL
Wait for 100 s
WE = VIH
PLSCNT = PLSCNT + 1
Wait for 4 s
OE = VIH
Wait for 4 s
OE = VIL
Verify Block Protect No Data = 01H? Yes Yes Protect Another Block? No Remove VID from A9 Block Protect Complete No PLSCNT = 25? Yes Device Failed
BPA: Block Address and ID Read Address (A6, A1, A0) ID Read Address = (0, 1, 0)
2002-08-06 38/48
TC58FVT321/B321FT/XB-70,-10
Block Protect 2
Start
RESET = VID
Wait for 4 s
PLSCNT = 1
Block Protect 2 Command First Bus Write Cycle (XXXH/60H)
Set up Address Addr. = BPA Block Protect 2 Command Second Bus Write Cycle (BPA/60H)
Wait for 100 s
Block Protect 2 Command Third Bus Write Cycle (XXXH/40H)
PLSCNT = PLSCNT + 1
Verify Block Protect No Data = 01H? Yes Yes Protect Another Block? No Remove VID from RESET Reset Command No PLSCNT = 25? Yes Remove VID from RESET
Reset Command
Device Failed
Block Protect Complete
BPA: Block Address and ID Read Address (A6, A1, A0) ID Read Address = (0, 1, 0)
2002-08-06 39/48
TC58FVT321/B321FT/XB-70,-10
BLOCK ERASE ADDRESS TABLES
(1) TC58FVT321 (top boot block)
BLOCK ADDRESS BANK # BLOCK # ADDRESS RANGE BANK ADDRESS A20 A19 A18 A17 A16 A15 A14 A13 A12 BA0 BA1 BA2 BA3 BK0 BA4 BA5 BA6 BA7 BA8 BA9 BA10 BA11 BK1 BA12 BA13 BA14 BA15 BA16 BA17 BA18 BA19 BK2 BA20 BA21 BA22 BA23 BA24 BA25 BA26 BA27 BK3 BA28 BA29 BA30 BA31 L L L L H H H H H H H H H H H H L L H H L H L H * * * * * * * * * * * * 1C0000H~1CFFFFH 1D0000H~1DFFFFH 1E0000H~1EFFFFH 1F0000H~1FFFFFH 0E0000H~0E7FFFH 0E8000H~0EFFFFH 0F0000H~0F7FFFH 0F8000H~0FFFFFH L L L L L L L L H H H H H H H H L L L L H H H H H H H H L L L L L L H H L L H H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * 140000H~14FFFFH 150000H~15FFFFH 160000H~16FFFFH 170000H~17FFFFH 180000H~18FFFFH 190000H~19FFFFH 1A0000H~1AFFFFH 1B0000H~1BFFFFH 0A0000H~0A7FFFH 0A8000H~0AFFFFH 0B0000H~0B7FFFH 0B8000H~0BFFFFH 0C0000H~0C7FFFH 0C8000H~0CFFFFH 0D0000H~0D7FFFH 0D8000H~0DFFFFH L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L L L H H L L H H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * 0C0000H~0CFFFFH 0D0000H~0DFFFFH 0E0000H~0EFFFFH 0F0000H~0FFFFFH 100000H~10FFFFH 110000H~11FFFFH 120000H~12FFFFH 130000H~13FFFFH 060000H~067FFFH 068000H~06FFFFH 070000H~077FFFH 078000H~07FFFFH 080000H~087FFFH 088000H~08FFFFH 090000H~097FFFH 098000H~09FFFFH L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L L L H H L L H H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * 040000H~04FFFFH 050000H~05FFFFH 060000H~06FFFFH 070000H~07FFFFH 080000H~08FFFFH 090000H~09FFFFH 0A0000H~0AFFFFH 0B0000H~0BFFFFH 020000H~027FFFH 028000H~02FFFFH 030000H~037FFFH 038000H~03FFFFH 040000H~047FFFH 048000H~04FFFFH 050000H~057FFFH 058000H~05FFFFH L L L L L L L L L L L L L L L L L L H H L H L H * * * * * * * * * * * * BYTE MODE 000000H~00FFFFH 010000H~01FFFFH 020000H~02FFFFH 030000H~03FFFFH WORD MODE 000000H~007FFFH 008000H~00FFFFH 010000H~017FFFH 018000H~01FFFFH
2002-08-06 40/48
TC58FVT321/B321FT/XB-70,-10
BLOCK ADDRESS BANK # BLOCK # ADDRESS RANGE BANK ADDRESS A20 A19 A18 A17 A16 A15 A14 A13 A12 BA32 BA33 BA34 BA35 BK4 BA36 BA37 BA38 BA39 BA40 BA41 BA42 BA43 BK5 BA44 BA45 BA46 BA47 BA48 BA49 BA50 BA51 BK6 BA52 BA53 BA54 BA55 BA56 BA57 BA58 BK7 BA59 BA60 BA61 BA62 H H H H H H H H H H H H H H H H H H H H H H L L L L H H H H H H H H H H H L L L L H H H L L H H L L H H L L H L H L H L H L H L H L * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 340000H~34FFFFH 350000H~35FFFFH 360000H~36FFFFH 370000H~37FFFFH 380000H~38FFFFH 390000H~39FFFFH 3A0000H~3AFFFFH 3B0000H~3BFFFFH 3C0000H~3CFFFFH 3D0000H~3DFFFFH 3E0000H~3EFFFFH 1A0000H~1A7FFFH 1A8000H~1AFFFFH 1B0000H~1B7FFFH 1B8000H~1BFFFFH 1C0000H~1C7FFFH 1C8000H~1CFFFFH 1D0000H~1D7FFFH 1D8000H~1DFFFFH 1E0000H~1E7FFFH 1E8000H~1EFFFFH 1F0000H~1F7FFFH H H H H H H H H L L L L H H H H H H H H L L L L H H H H L L L L L L H H L L H H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * 2C0000H~2CFFFFH 2D0000H~2DFFFFH 2E0000H~2EFFFFH 2F0000H~2FFFFFH 300000H~30FFFFH 310000H~31FFFFH 320000H~32FFFFH 330000H~33FFFFH 160000H~167FFFH 168000H~16FFFFH 170000H~177FFFH 178000H~17FFFFH 180000H~187FFFH 188000H~18FFFFH 190000H~197FFFH 198000H~19FFFFH H H H H H H H H L L L L L L L L L L L L H H H H H H H H L L L L L L H H L L H H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * 240000H~24FFFFH 250000H~25FFFFH 260000H~26FFFFH 270000H~27FFFFH 280000H~28FFFFH 290000H~29FFFFH 2A0000H~2AFFFFH 2B0000H~2BFFFFH 120000H~127FFFH 128000H~12FFFFH 130000H~137FFFH 138000H~13FFFFH 140000H~147FFFH 148000H~14FFFFH 150000H~157FFFH 158000H~15FFFFH H H H H L L L L L L L L L L L L L L H H L H L H * * * * * * * * * * * * BYTE MODE 200000H~20FFFFH 210000H~21FFFFH 220000H~22FFFFH 230000H~23FFFFH WORD MODE 100000H~107FFFH 108000H~10FFFFH 110000H~117FFFH 118000H~11FFFFH
2002-08-06 41/48
TC58FVT321/B321FT/XB-70,-10
BLOCK ADDRESS BANK # BLOCK # ADDRESS RANGE BANK ADDRESS A20 A19 A18 A17 A16 A15 A14 A13 A12 BA63 BA64 BA65 BA66 BK8 BA67 BA68 BA69 BA70 H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L H H L H L H 3F8000H~3F9FFFH 3FA000H~3FBFFFH 3FC000H~3FDFFFH 3FE000H~3FFFFFH 1FC000H~1FCFFFH 1FD000H~1FDFFFH 1FE000H~1FEFFFH 1FF000H~1FFFFFH H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L H H L H L H BYTE MODE 3F0000H~3F1FFFH 3F2000H~3F3FFFH 3F4000H~3F5FFFH 3F6000H~3F7FFFH WORD MODE 1F8000H~1F8FFFH 1F9000H~1F9FFFH 1FA000H~1FAFFFH 1FB000H~1FBFFFH
2002-08-06 42/48
TC58FVT321/B321FT/XB-70,-10
(2) TC58FVB321 (bottom boot block)
BLOCK ADDRESS BANK # BLOCK # ADDRESS RANGE BANK ADDRESS A20 A19 A18 A17 A16 A15 A14 A13 A12 BA0 BA1 BA2 BA3 BK0 BA4 BA5 BA6 BA7 BA8 BA9 BA10 BK1 BA11 BA12 BA13 BA14 BA15 BA16 BA17 BA18 BK2 BA19 BA20 BA21 BA22 BA23 BA24 BA25 BA26 BK3 BA27 BA28 BA29 BA30 L L L L H H H H L L L L H H H H L L H H L H L H * * * * * * * * * * * * 140000H~14FFFFH 150000H~15FFFFH 160000H~16FFFFH 170000H~17FFFFH 0A0000H~0A7FFFH 0A8000H~0AFFFFH 0B0000H~0B7FFFH 0B8000H~0BFFFFH L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L L L H H L L H H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * 0C0000H~0CFFFFH 0D0000H~0DFFFFH 0E0000H~0EFFFFH 0F0000H~0FFFFFH 100000H~10FFFFH 110000H~11FFFFH 120000H~12FFFFH 130000H~13FFFFH 060000H~067FFFH 068000H~06FFFFH 070000H~077FFFH 078000H~07FFFFH 080000H~087FFFH 088000H~08FFFFH 090000H~097FFFH 098000H~09FFFFH L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H L L L L L L L H H H H L L L L L L L L L H H L L H H L L H H L L L L H L H L H L H L H L H H H H H * * * * * * * * * * * L L H H * * * * * * * * * * * L H L H * * * * * * * * * * * 008000H~009FFFH 00A000H~00BFFFH 00C000H~00DFFFH 00E000H~00FFFFH 010000H~01FFFFH 020000H~02FFFFH 030000H~03FFFFH 040000H~04FFFFH 050000H~05FFFFH 060000H~06FFFFH 070000H~07FFFFH 080000H~08FFFFH 090000H~09FFFFH 0A0000H~0AFFFFH 0B0000H~0BFFFFH 004000H~004FFFH 005000H~005FFFH 006000H~006FFFH 007000H~007FFFH 008000H~00FFFFH 010000H~017FFFH 018000H~01FFFFH 020000H~027FFFH 028000H~02FFFFH 030000H~037FFFH 038000H~03FFFFH 040000H~047FFFH 048000H~04FFFFH 050000H~057FFFH 058000H~05FFFFH L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H L H L H BYTE MODE 000000H~001FFFH 002000H~003FFFH 004000H~005FFFH 006000H~007FFFH WORD MODE 000000H~000FFFH 001000H~001FFFH 002000H~002FFFH 003000H~003FFFH
2002-08-06 43/48
TC58FVT321/B321FT/XB-70,-10
BLOCK ADDRESS BANK # BLOCK # ADDRESS RANGE BANK ADDRESS A20 A19 A18 A17 A16 A15 A14 A13 A12 BA31 BA32 BA33 BA34 BK4 BA35 BA36 BA37 BA38 BA39 BA40 BA41 BA42 BK5 BA43 BA44 BA45 BA46 BA47 BA48 BA49 BA50 BK6 BA51 BA52 BA53 BA54 BA55 BA56 BA57 BA58 BK7 BA59 BA60 BA61 BA62 H H H H H H H H L L L L H H H H L L H H L H L H * * * * * * * * * * * * 340000H~34FFFFH 350000H~35FFFFH 360000H~36FFFFH 370000H~37FFFFH 1A0000H~1A7FFFH 1A8000H~1AFFFFH 1B0000H~1B7FFFH 1B8000H~1BFFFFH H H H H H H H H L L L L H H H H H H H H L L L L H H H H L L L L L L H H L L H H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * 2C0000H~2CFFFFH 2D0000H~2DFFFFH 2E0000H~2EFFFFH 2F0000H~2FFFFFH 300000H~30FFFFH 310000H~31FFFFH 320000H~32FFFFH 330000H~33FFFFH 160000H~167FFFH 168000H~16FFFFH 170000H~177FFFH 178000H~17FFFFH 180000H~187FFFH 188000H~18FFFFH 190000H~197FFFH 198000H~19FFFFH H H H H H H H H L L L L L L L L L L L L H H H H H H H H L L L L L L H H L L H H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * 240000H~24FFFFH 250000H~25FFFFH 260000H~26FFFFH 270000H~27FFFFH 280000H~28FFFFH 290000H~29FFFFH 2A0000H~2AFFFFH 2B0000H~2BFFFFH 120000H~127FFFH 128000H~12FFFFH 130000H~137FFFH 138000H~13FFFFH 140000H~147FFFH 148000H~14FFFFH 150000H~157FFFH 158000H~15FFFFH L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L L L L L H H L L H H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * 1C0000H~1CFFFFH 1D0000H~1DFFFFH 1E0000H~1EFFFFH 1F0000H~1FFFFFH 200000H~20FFFFH 210000H~21FFFFH 220000H~22FFFFH 230000H~23FFFFH 0E0000H~0E7FFFH 0E8000H~0EFFFFH 0F0000H~0F7FFFH 0F8000H~0FFFFFH 100000H~107FFFH 108000H~10FFFFH 110000H~117FFFH 118000H~11FFFFH L L L L H H H H H H H H L L L L L L H H L H L H * * * * * * * * * * * * BYTE MODE 180000H~18FFFFH 190000H~19FFFFH 1A0000H~1AFFFFH 1B0000H~1BFFFFH WORD MODE 0C0000H~0C7FFFH 0C8000H~0CFFFFH 0D0000H~0D7FFFH 0D8000H~0DFFFFH
2002-08-06 44/48
TC58FVT321/B321FT/XB-70,-10
BLOCK ADDRESS BANK # BLOCK # ADDRESS RANGE BANK ADDRESS A20 A19 A18 A17 A16 A15 A14 A13 A12 BA63 BA64 BA65 BA66 BK8 BA67 BA68 BA69 BA70 H H H H H H H H H H H H H H H H L L H H L H L H * * * * * * * * * * * * 3C0000H~3CFFFFH 3D0000H~3DFFFFH 3E0000H~3EFFFFH 3F0000H~3FFFFFH 1E0000H~1E7FFFH 1E8000H~1EFFFFH 1F0000H~1F7FFFH 1F8000H~1FFFFFH H H H H H H H H H H H H L L L L L L H H L H L H * * * * * * * * * * * * BYTE MODE 380000H~38FFFFH 390000H~39FFFFH 3A0000H~3AFFFFH 3B0000H~3BFFFFH WORD MODE 1C0000H~1C7FFFH 1C8000H~1CFFFFH 1D0000H~1D7FFFH 1D8000H~1DFFFFH
2002-08-06 45/48
TC58FVT321/B321FT/XB-70,-10
BLOCK SIZE TABLE
(1) TC58FVT321 (top boot block)
BLOCK # BA0~BA7 BA8~BA15 BA16~BA23 BA24~BA31 BA32~BA39 BA40~BA47 BA48~BA55 BA56~BA62 BA63~BA70 BLOCK SIZE BYTE MODE 64 Kbytes 64 Kbytes 64 Kbytes 64 Kbytes 64 Kbytes 64 Kbytes 64 Kbytes 64 Kbytes 8 Kbytes WORD MODE 32 Kwords 32 Kwords 32 Kwords 32 Kwords 32 Kwords 32 Kwords 32 Kwords 32 Kwords 4 Kwords BANK # BK0 BK1 BK2 BK3 BK4 BK5 BK6 BK7 BK8 BANK SIZE BLOCK COUNT BYTE MODE 512 Kbytes 512 Kbytes 512 Kbytes 512 Kbytes 512 Kbytes 512 Kbytes 512 Kbytes 448 Kbytes 64 Kbytes WORD MODE 256 Kwords 256 Kwords 256 Kwords 256 Kwords 256 Kwords 256 Kwords 256 Kwords 224 Kwords 32 Kwords 8 8 8 8 8 8 8 7 8
(2) TC58FVB321 (bottom boot block)
BLOCK # BA0~BA7 BA8~BA14 BA15~BA22 BA23~BA30 BA31~BA38 BA39~BA46 BA47~BA54 BA55~BA62 BA63~BA70 BLOCK SIZE BYTE MODE 8 Kbytes 64 Kbytes 64 Kbytes 64 Kbytes 64 Kbytes 64 Kbytes 64 Kbytes 64 Kbytes 64 Kbytes WORD MODE 4 Kwords 32 Kwords 32 Kwords 32 Kwords 32 Kwords 32 Kwords 32 Kwords 32 Kwords 32 Kwords BANK # BK0 BK1 BK2 BK3 BK4 BK5 BK6 BK7 BK8 BANK SIZE BLOCK COUNT BYTE MODE 64 Kbytes 448 Kbytes 512 Kbytes 512 Kbytes 512 Kbytes 512 Kbytes 512 Kbytes 512 Kbytes 512 Kbytes WORD MODE 32 Kwords 224 Kwords 256 Kwords 256 Kwords 256 Kwords 256 Kwords 256 Kwords 256 Kwords 256 Kwords 8 7 8 8 8 8 8 8 8
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TC58FVT321/B321FT/XB-70,-10
PACKAGE DIMENSIONS
Unit: mm
2002-08-06 47/48
TC58FVT321/B321FT/XB-70,-10
PACKAGE DIMENSIONS
Unit: mm
2002-08-06 48/48

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